Effect of Source Impedance on the Performance of Single-Phase and Three-Phase Full Converters
For single-phase and three-phase full converters, the derivation of output voltages, represented by the equations \( \frac{2V_{ml}}{\pi} \cos \alpha \) and \( \frac{3V_{ml}}{\pi} \cos \alpha \), assumes that the current transitions from the outgoing SCRs to the incoming SCRs occur instantaneously.
This means that when the incoming SCRs T1 and T2 are fired in a single-phase full converter, the outgoing SCRs T3 and T4 are turned off as a result of the applied reverse voltage, causing the current to shift to SCRs T1 and T2 instantaneously.
This condition holds true only if the voltage source has no internal impedance. In reality, the source does have internal impedance. If the source impedance is resistive, there will be a voltage drop across this resistance, reducing the average output voltage of the converter by \( I_0 \cdot r_s \) for a single-phase converter and by \( 2 I_0 \cdot r_s \) for a three-phase converter. Here, \( I_0 \) represents the constant DC load current, and \( r_s \) is the source resistance per phase. Although source resistance is generally low, it is assumed that the commutation duration is very brief and the current transfer occurs immediately when the incoming SCRs are triggered. Nevertheless, the voltage drop caused by source resistance should still be considered.
In the following discussion, the source impedance is considered to be purely inductive. The load inductance is assumed to be large enough that the output current remains nearly constant. The presence of source inductance results in simultaneous conduction of both the outgoing and incoming SCRs.
During the commutation period, when both sets of SCRs are conducting, the output voltage equals the average value of the conducting phase voltages. For a single-phase converter, this results in a load voltage of zero, whereas for a three-phase converter, the load voltage is given by \( \frac{v_a + v_b}{2} \), which is the average value of the voltages of the conducting phases (phases a and b).
The commutation period, defined as the duration when both outgoing and incoming SCRs are conducting, is also referred to as the overlap period. The angular duration during which this overlap occurs is called the commutation angle or overlap angle \( μ \), expressed in degrees or radians.
This section explores the impact of source inductance on both single-phase and three-phase full converters.
single-phase full converter
The commutation overlap is more significant than in semi-converters due to the nature of current transfer between incoming and outgoing thyristors.
In the circuit shown in Fig(a), \( L_s \) represents the source inductance. For the purposes of analysis, it is assumed that the load current is constant (analyzing the circuit with a pulsating load current is more complex). The equivalent circuit for analysis is depicted in Fig(b).
When terminal 1 of the source voltage \( v_s \) is positive, the current \( i_1 \) flows through the path \( L_s \) → T1 → load → T2, as shown in the path \( v_s \) → \( L_s \) → T1 → T2 → load in Fig(b). Conversely, when terminal 2 of the source voltage \( v_s \) is positive, the load current \( i_2 \) flows through T3 → load → T4, depicted as the path \( v_s \) → \( L_s \) → T3 → T4 → load in Fig(b).
This arrangement illustrates the current paths during each half-cycle, and the overlap period during which both sets of thyristors conduct simultaneously due to the inductance \( L_s \). This commutation overlap affects the output voltage and the shape of the current waveform, making it an important factor to consider in converter performance analysis.
(a) Single-phase full converter with source inductance \(L_s\) (b) its equivalent circuit and (c) typical current and voltage waveforms with \(L_s\) |
When thyristors T1 and T2 are triggered at a firing angle \( \alpha \), commutation of the previously conducting thyristors T3 and T4 begins. Due to the presence of source inductance \( L_s \), the current in the outgoing thyristors T3 and T4 decreases gradually from its initial value \( I_0 \) to zero. Simultaneously, the current in the incoming thyristors T1 and T2 increases gradually from zero to the full load current \( \overline{I_0} \).
During the commutation period of T1, T2, and T3, T4 (i.e., the overlap angle \( \mu \)), the KVL for the loop \( abeda \) is given by:
\[
V_1 - L_s \frac{di_1}{dt} = V_2 - L_s \frac{di_2}{dt}
\]
Rearranging this equation, we get
\[
V_1 - V_2 = L_s \left( \frac{di_1}{dt} - \frac{di_2}{dt} \right)
\] Where:
- \( V_1 \) and \( V_2 \) are the input phase voltages.
- \( L_s \) is the source inductance.
- \( \frac{di_1}{dt} \) and \( \frac{di_2}{dt} \) are the rates of change of current through the inductance.
Considering the source voltage equations, as seen in Fig. (c) If \( V_1 = V_m \sin(\omega t) \), Then \( V_2 = -V_m \sin(\omega t) \).
\[L_s \left(\frac{di_1}{dt} - \frac{di_2}{dt}\right) = V_m \sin(\omega t) - (-V_m \sin(\omega t)) = V_m \sin(\omega t) + V_m \sin(\omega t) = 2V_m \sin(\omega t)\] ...............................equation(1)
If the total load current \( I_0 \) is constant and is shared between \( i_1 \) and \( i_2 \), we have:
\[i_1 + i_2 = I_0\]
Differentiating both sides with respect to time:
\[\frac{di_1}{dt} + \frac{di_2}{dt} = \frac{dI_0}{dt}\]
Since \( I_0 \) is constant:
\[\frac{dI_0}{dt} = 0\]
This means:
\[\frac{di_1}{dt} + \frac{di_2}{dt}= 0\] ....................equestion(2)
Equestion(1),
\[L_s \left(\frac{di_1}{dt} - \frac{di_2}{dt}\right) = 2V_m \sin(\omega t)\]
We can isolate \( \frac{di_1}{dt} - \frac{di_2}{dt} \) by dividing both sides by \( L_s \):
\[\frac{di_1}{dt} - \frac{di_2}{dt} = \frac{2V_m}{L_s} \sin(\omega t)\]..................equestion(3)
Adding equation (2) and equation (3):
\[\left(\frac{di_1}{dt} + \frac{di_2}{dt}\right) + \left(\frac{di_1}{dt} - \frac{di_2}{dt}\right) = 0 + \frac{2V_m}{L_s} \sin(\omega t)\]
Simplifying the left side:
\[2 \frac{di_1}{dt} = \frac{2V_m}{L_s} \sin(\omega t)\]
Solving for \( \frac{di_1}{dt} \):
\[\frac{di_1}{dt} = \frac{V_m}{L_s} \sin(\omega t)\]........................ equation(4)
If the load current \( i_1 \) through the thyristor pair \( T_1 \) and \( T_2 \) builds up from zero to \( I_0 \) during the overlap angle \( \mu \), we can describe the behavior as follows:
- Initial Condition: - At \( \omega t = \alpha \), \( i_1 = 0 \). This marks the beginning of the conduction of the thyristor pair.
- End Condition: - At \( \omega t = \alpha + \mu \), \( i_1 = I_0 \). This marks the end of the overlap period, where the current \( i_1 \) reaches the full load current \( I_0 \).
Equestion(4),
To integrate the differential equation \( \frac{di_1}{dt} = \frac{V_m}{L_s} \sin(\omega t) \), we will apply the given limits.
We integrate both sides of the equation over the appropriate intervals:
Given:
\[\frac{di_1}{dt} = \frac{V_m}{L_s} \sin(\omega t) \tag{4}\]
We will integrate both sides with respect to time:
On the left-hand side, we integrate the current \( i_1 \) from \( 0 \) to \( i_0 \), and on the right-hand side, we integrate the time from \( \frac{\alpha}{\omega} \) to \( \frac{\alpha + \mu}{\omega} \).
Step 1: Integrating the left-hand side:
\[\int_0^{i_0} di_1 = i_0\]
Step 2: Integrating the right-hand side:
First, the integral of \( \frac{V_m}{L_s} \sin(\omega t) \) is:
\[\int_{\frac{\alpha}{\omega}}^{\frac{\alpha + \mu}{\omega}} \frac{V_m}{L_s} \sin(\omega t) \, dt\]
To solve this, we know that:
\[\int \sin(\omega t) \, dt = -\frac{1}{\omega} \cos(\omega t)\]
So, applying the limits:
\[\int_{\frac{\alpha}{\omega}}^{\frac{\alpha + \mu}{\omega}} \frac{V_m}{L_s} \sin(\omega t) \, dt = \frac{V_m}{L_s} \left[-\frac{1}{\omega} \cos(\omega t)\right]_{\frac{\alpha}{\omega}}^{\frac{\alpha + \mu}{\omega}}\]
Evaluating this:
\[= \frac{V_m}{L_s \omega} \left[ \cos(\alpha) - \cos(\alpha + \mu) \right]\]
Step 3: Equating both sides:
Now, we equate the left-hand side and the right-hand side:
\[i_0 = \frac{V_m}{L_s \omega} \left[ \cos(\alpha) - \cos(\alpha + \mu) \right]\]...............................equestion(5)
This equation relates the load current \( i_0 \) to the overlap angle \( \mu \), the supply voltage \( V_m \), the inductance \( L_s \), and the firing angle \( \alpha \).
The derivation of the average output voltage \( V_0 \) from an AC signal, potentially for a controlled rectifier or inverter circuit.
Let's break down the steps:
- The average output voltage \( V_0 \) is defined as: \[V_0 = \frac{V_m}{\pi} \int_{\alpha + \mu}^{\alpha + \pi} \sin(\theta) \, d\theta\]
- To solve the integral: \[\int \sin(\theta) \, d\theta = -\cos(\theta)\] ; So:\[ V_0 = \frac{V_m}{\pi} \left[-\cos(\theta) \right]_{\alpha + \mu}^{\alpha + \pi}\]
- Evaluating the limits:\[V_0 = \frac{V_m}{\pi} \left[ -\cos(\alpha + \pi) + \cos(\alpha + \mu) \right]\]
- Simplifying using the trigonometric identity \(\cos(\alpha + \pi) = -\cos(\alpha)\); \[V_0 = \frac{V_m}{\pi} \left[ \cos(\alpha) + \cos(\alpha + \mu) \right]\]
Thus, the expression for the average output voltage \( V_0 \) is:
\[V_0 = \frac{V_m}{\pi} \left[ \cos(\alpha) + \cos(\alpha + \mu) \right]\]...........................equestion (6)
From equestion(5),
\[i_0 = \frac{V_m}{L_s \omega} \left[ \cos(\alpha) - \cos(\alpha + \mu) \right]\]
To express \(\cos(\alpha + \mu)\) in terms of \(i_0\), \(V_m\), \(L_s\), \(\omega\), and \(\cos(\alpha)\):
- Multiply both sides by \(L_s \omega / V_m\):\[\frac{i_0 L_s \omega}{V_m} = \cos(\alpha) - \cos(\alpha + \mu)\]
- Rearrange to solve for \(\cos(\alpha + \mu)\):\[\cos(\alpha + \mu) = \cos(\alpha) - \frac{i_0 L_s \omega}{V_m}\]
To substitute the value of \(\cos(\alpha + \mu)\) from the previous expression into equation (6), we have:
Given:
\[\cos(\alpha + \mu) = \cos(\alpha) - \frac{i_0 L_s \omega}{V_m}\]
Substitute this into equation (6):
\[V_0 = \frac{V_m}{\pi} \left[ \cos(\alpha) + \left(\cos(\alpha) - \frac{i_0 L_s \omega}{V_m} \right) \right]\]
Simplify the expression:
\[V_0 = \frac{V_m}{\pi} \left[ 2\cos(\alpha) - \frac{i_0 L_s \omega}{V_m} \right]\]
Distribute \(\frac{V_m}{\pi}\):
\[V_0 = \frac{2V_m \cos(\alpha)}{\pi} - \frac{i_0 L_s \omega}{\pi}\]..................equestion(7)
From the equation(5),
To solve for \(\cos(\alpha)\) from the equation
\[i_0 = \frac{V_m}{L_s \omega} \left[ \cos(\alpha) - \cos(\alpha + \mu) \right]\]
we can follow these steps:
Step 1: Isolate \(\cos(\alpha)\)
Start by multiplying both sides of the equation by \(L_s \omega / V_m\) to simplify:
\[\frac{i_0 L_s \omega}{V_m} = \cos(\alpha) - \cos(\alpha + \mu)\]
Next, solve for \(\cos(\alpha)\) by adding \(\cos(\alpha + \mu)\) to both sides:
\[\cos(\alpha) = \frac{i_0 L_s \omega}{V_m} + \cos(\alpha + \mu)\]
Step 2: Use a trigonometric identity (if needed)
If you need to simplify further, you can use a trigonometric identity for \(\cos(\alpha + \mu)\):
\[\cos(\alpha + \mu) = \cos(\alpha) \cos(\mu) - \sin(\alpha) \sin(\mu)\]
Substitute this identity into the equation:
\[\cos(\alpha) = \frac{i_0 L_s \omega}{V_m} + \left[\cos(\alpha) \cos(\mu) - \sin(\alpha) \sin(\mu)\right]\]
Given Equations:
1. Equation (6):
\[V_0 = \frac{V_m}{\pi} \left[ \cos(\alpha) + \cos(\alpha + \mu) \right]\]
2.Expression for \(\cos(\alpha)\):
\[\cos(\alpha) = \frac{i_0 L_s \omega}{V_m} + \cos(\alpha + \mu)\]
Step 1: Substitute the expression for \(\cos(\alpha)\) into Equation (6)
Substitute \(\cos(\alpha) = \frac{i_0 L_s \omega}{V_m} + \cos(\alpha + \mu)\) into Equation (6):
\[V_0 = \frac{V_m}{\pi} \left[ \left( \frac{i_0 L_s \omega}{V_m} + \cos(\alpha + \mu) \right) + \cos(\alpha + \mu) \right]\]
Step 2: Simplify the expression
Combine the terms with \(\cos(\alpha + \mu)\):
\[V_0 = \frac{V_m}{\pi} \left[ \frac{i_0 L_s \omega}{V_m} + 2 \cos(\alpha + \mu) \right]\]
Now simplify the expression:
\[V_0 = \frac{i_0 L_s \omega}{\pi} + \frac{2V_m}{\pi} \cos(\alpha + \mu)\]
Final Expression:
The final expression after substituting \(\cos(\alpha)\) into Equation (6) is:
\[V_0 = \frac{i_0 L_s \omega}{\pi} + \frac{2V_m}{\pi} \cos(\alpha + \mu)\].................. equation(8)
With the help of Equation (7), a DC equivalent circuit for a 2-pulse single-phase full converter can be drawn, as shown In this figure, diode D simply indicates that the load current is unidirectional. The equivalent circuit reveals that the effect of the source inductance \(L_s\) is to present an equivalent resistance of magnitude \( \frac{\omega L_s}{\pi} \) ohms in series with the internal voltage of the rectifier, \( \frac{2V_m}{\pi} \cos(\alpha) \). The voltage drop due to \(L_s\) is proportional to the load current \(I_0\) and the inductance \(L_s\). As the load current (or source inductance) increases, the commutation interval (or overlap angle) also increases, leading to a decrease in the average output voltage, as illustrated in this figer.
DC equivalent circuit of single-phase full converter |
In a single-phase full converter, as long as the firing angle \(\mu < \pi\), the output voltage is given by Equation(7). When \(\mu = \pi\), the SCRs will remain conducting throughout the overlap period, effectively short-circuiting the load, and as a result, the output voltage will be zero. This occurs because, during the overlap angle, all the SCRs conduct simultaneously.
Three-phase full converter
In a three-phase full converter bridge with source inductance \(𝐿_s\) in each line, as shown in Fig, the system can be analyzed assuming a constant load current. This assumption simplifies the analysis, especially when dealing with the pulsating current that typically occurs in such converters.
Three-phase full converter with source inductance \(L_s\) in each line |
In Fig(b), the conduction of various SCRs is illustrated with a firing angle α = 0 and an overlap angle μ = 0. In this figure, T5 and T6 conduct up to ωt = 30°. From ωt = 30° to 90° (a span of 60°), T1 and T6 conduct. From ωt = 90° to 150°, T1 and T2 conduct, and so on. At ωt = 90°, only two SCRs conduct at a time: one from the positive group and one from the negative group.
Figure(c) illustrates the effect of overlap in SCR conduction. From \(\omega t = 0^\circ\) to \(30^\circ\), SCRs T5 and T6 conduct. At \(\omega t = 30^\circ\), T5 begins to turn off while T1 is triggered, and both T5 and T6 are from the positive group. As T1 is triggered, the current through T5 starts decreasing while the current through T1 starts increasing. At \(\omega t = 30^\circ + \mu\), the current through T5 becomes zero, and the current through T1 reaches its full value \(I_0\). From \(\omega t = 30^\circ\) to \(30^\circ + \mu\), three SCRs (T5, T6, and T1) conduct. After \(\omega t = 30^\circ + \mu\), only T1 conducts.
At \(\omega t = 90^\circ\), T2 is triggered, and the current through T1 starts decreasing while the current through T2 increases. Between \(\omega t = 90^\circ\) and \(90^\circ + \mu\), three SCRs (T6, T1, and T2) conduct. At \(\omega t = 90^\circ + \mu\), the current through T1 reaches zero, and T2 conducts fully. After \(\omega t = 90^\circ + \mu\), only T1 and T2 conduct.
This pattern repeats throughout the full converter operation. When a positive group of SCRs undergoes commutation, two SCRs from the positive group and one from the negative group conduct. Once commutation in the positive group is complete, only one SCR from each group conducts. The same principle applies to the negative group: during commutation, two SCRs from the negative group and one from the positive group conduct, followed by a state where only one SCR from each group conducts.The conduction sequence is as follows: T5-T6, T5-T6-T1, T6-T1, T6-T1-T2, T1-T2, T1-T2-T3, T2-T3, T2-T3-T4, T3-T4, T3-T4-T5, T4-T5, T4-T5-T6, T5-T6, and so on.
Current and voltage waveforms for a 3-phase full converter showing commutation during overlap |
It is observed that three and two SCRs conduct alternately. Fig(c) shows that, in a 6-pulse converter, there are six shaded areas representing six commutations per cycle of the source voltage.
During the commutation between T5 and T1 (current transfer from T5 to T1), the output voltage is derived by averaging the corresponding phase voltages \( V_c \) and \( V_a \) from the positive group. This means that, from \( \omega t = 30^\circ \) to \( 30^\circ + \mu \), the voltage follows the curve \((v_a + v_c)/2\) from the positive group, as indicated by segment jkl in Fig. 6.35 (a). Similarly, during the commutation of T6 and T2, the voltage waveform from the negative group is \((v_b + v_c)/2\), as shown by segment mn. During the commutation of T1 and T3, the voltage is \((v_a + v_b)/2\), as shown by curve op, and so forth.
In this Fig, the firing angle delay has been set to highlight the effect of source inductance. However, this analysis applies to any firing angle delay, provided the overlap angle is less than 60°. In Fig(a), \( v_a \), \( v_b \), and \( v_c \) are the phase voltages, and the output voltage lies between the shaded areas as depicted.
The effect of source inductance \( L_s \) is to reduce the average DC output voltage. This reduction is proportional to the nearly triangular area jkl shown in Fig(a). The average value of this reduction in output voltage due to overlap is equal to the triangular area jkl divided by the periodicity of this area, which is \( \pi / 3 \). Thus, the average value of the fall in output voltage due to overlap can be calculated accordingly.
\[\text{Average value of voltage drop} = \frac{3}{\pi} \int_{0}^{\mu} v_{L} \, d(\omega t)\]
Given that \( v_{L} = L_s \frac{di}{dt} \), we can substitute this into the integral:
\[\text{Average value of voltage drop} = \frac{3}{\pi} \int_{0}^{\mu} L_s \frac{di}{dt} \, d(\omega t)\]
Since \( L_s \) is a constant, we can take it out of the integral:
\[\text{Average value of voltage drop} = \frac{3 L_s}{\pi} \int_{0}^{\mu} \frac{di}{dt} \, d(\omega t)\]
If \(\omega\) is constant, we can express \(d(\omega t)\) in terms of \(dt\) as \(d(\omega t) = \omega \, dt\). Thus, the integral becomes:
\[\text{Average value of voltage drop} = \frac{3 L_s}{\pi} \int_{0}^{\mu/\omega} \frac{di}{dt} \, \omega \, dt\]
Simplifying, we have:
\[\text{Average value of voltage drop} = \frac{3 L_s \omega}{\pi} \int_{0}^{\mu/\omega} \frac{di}{dt} \, dt\]
\[\text{Average value of voltage drop} = \frac{3 L_s \omega}{\pi} \int_{0}^{I_0} di\]
Integrating \( di \) over the interval \( 0 \) to \( I_0 \) gives:
\[\text{Average value of voltage drop} = \frac{3 L_s \omega}{\pi} [i]_{0}^{I_0} = \frac{3 L_s \omega}{\pi} I_0\]
So, the average value of the voltage drop due to the overlap is:
\[\text{Average value of voltage drop} = \frac{3 L_s \omega I_0}{\pi}\]
Here, \( I_0 \) is the current change during the overlap period.
Output voltage with no overlap = internal voltage of the 3-phase full converter
The average output (or internal) DC voltage of a 3-phase full converter with a firing angle \( \alpha \) (where \( \alpha \) is the delay angle at which the SCRs are fired) and no overlap is given by:
\[V_{\text{dc}} = \frac{3 V_ml \cos(\alpha)}{\pi}\]
Where:
- \( V_ml \) is the peak value of the phase voltage (i.e., \( V_ml = \sqrt{2} V_{\text{rms}} \), where \( V_{\text{rms}} \) is the root mean square value of the phase voltage).
- \( \alpha \) is the firing angle (in radians or degrees).
- \( \pi \) is a constant.
Output voltage with overlap,
To calculate the output voltage \( V_0 \) (or \( V_{\text{dc}} \)) considering both the average output voltage and the voltage drop due to source inductance \( L_s \), we need to combine the two equations you've mentioned:
1.Average DC Output Voltage (without considering the voltage drop):
\[V_{\text{dc}} = \frac{3 V_m \cos(\alpha)}{\pi}\]
where:
- \( V_m \) is the peak phase voltage,
- \( \alpha \) is the firing angle.
2. Average Voltage Drop due to Source Inductance \( L_s \):
\[\text{Average value of voltage drop} = \frac{3 L_s \omega I_0}{\pi}\]
where:
- \( L_s \) is the source inductance,
- \( \omega \) is the angular frequency,
- \( I_0 \) is the current change during the overlap period.
Net Output Voltage (after considering the voltage drop):
The net output voltage \( V_0 \) after considering the voltage drop due to the source inductance would be:
\[V_0 = V_{\text{dc}} - \text{Average value of voltage drop}\]
Substitute the expressions:
\[V_0 = \frac{3 V_m \cos(\alpha)}{\pi} - \frac{3 L_s \omega I_0}{\pi}\]
Simplifying:
\[V_0 = \frac{3}{\pi} \left( V_m \cos(\alpha) - L_s \omega I_0 \right)\]...................equestion(9)
In general, for m-pulse converter, fall in output voltage due to overlap
= \[\frac{m}{2\pi} \int_0^\mu L_s = \frac{di}{dt} \, d(\omega t)\] = \[\frac{m \omega L_s}{2\pi} = \int_{0}^{\mu/\omega} \frac{di}{dt} \, dt\] = \[\frac{m \omega L_s}{2\pi} \int_{0}^{I_0} di\]= \[ \frac{m \omega L_s}{2\pi} I_0\]
For 2-pulse converter, voltage drop due to overlap =\[ \frac{L_s}{\pi} I_0\]
For 6-pulse converter, voltage drop due to overlap =\[ \frac{3 \omega L_s}{\pi} I_0\]
Output voltage for a 3-phase full converter, similar to that given for a 1-phase full converter in Eq(8) is given by
\[V_0 = \frac{3 V_{ml}}{\pi} \cos(\alpha + \mu) + \frac{3 \omega L_s}{\pi} I_0\]...........................equestion(10)